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FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
CSB
SCLK
CS
SI
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
SO
OD15 OD14 OD13 OD12 OD11 OD10 OD9
OD8
OD7
OD6
OD5
OD4
OD3
OD2
OD1 OD0
Notes
DO, D1, D2, ... D15 : D15 relate to the most recent recent ordered program of data into device.
NOTES: 1.
2.
3.
RSTB is in a logic H state during the above operation.
the device.
2. OD2, ..., : OD0 16 16 of of fault and fault data out of the LUX IC out
OD0, OD1, OD15 and OD15 relate to the first bits bits ordered ordered status and status data device. of the device.
Figure 8. Single 16-Bit Word SPI Communication
SERIAL INPUT (SI)
The SI pin is a serial interface command data input pin.
Each SI bit is read on the falling edge of SCLK. A 16-bit
stream of serial data is required on the SI pin, starting with
D15 to D0. SI has a passive pull-down, R DOWN .
SERIAL OUTPUT (SO)
The SO data pin is a tri-stateable output from the shift
register. The SO pin remains in a high-impedance state until
the CS pin is put into a logic [0] state. The SO data is capable
of reporting the status of the output, the device configuration,
and the state of the key inputs. The SO pin changes state on
CHIP SELECT (CS)
The CS pin enables communication with the master
device. When this pin is in a logic [0] state, the device is
capable of transferring information to, and receiving
information from, the master device. The 10XS3535 device
latches in data from the Input Shift registers to the addressed
registers on the rising edge of CS. The device transfers
status information from the power output to the Shift register
on the falling edge of CS. The SO output driver is enabled
when CS is logic [0]. CS should transition from a logic [1] to a
logic [0] state only when SCLK is a logic [0]. CS has a
passive pull-up, R UP .
the rising edge of SCLK and reads out on the falling edge of
SCLK.
MC10XS3535
Analog Integrated Circuit Device Data ?
24
Freescale Semiconductor
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